AMD launches Epyc 7003 processors with 768 MB of virtual 3D cache. Big benefits for HPC and CAD/CAM

Visualization of the AMD Epyc 7003 Milan processor with V-Cache 3D
Source: AMD

The 3D V-Cache chiplet is released for the first time on AMD server processors. Compared to the common Epyce 7003, they pack a full L3 cache of three-quarters of a gigabyte, which is believed to lead to huge performance gains for some HPC and CAD/CAM applications.

The information leak was accurate this time – yesterday, March 21, AMD officially released the first commercially available processors with a 3D V-Cache chiplet. Even before next month, the Ryzen 7 5800X3D gaming build has been released, featuring the Epyc 7003 “Milan-X” server processors, which pack exactly eight chips, giving the processors three-quarters of a gigabyte of L3 cache useful for applications such as engineering calculations and simulations.

These processors are based on the successful Epyc 7003 “Milan” concept processor with Zen 3 architecture for the SP3 platform, which AMD launched last year and has up to 64 cores and a DDR4 memory controller- 3200 with eight channels. The Milan-X variant is an extension (literally) of the most powerful configuration of the Epyc 7003, where the processor has eight 7nm CPU chipsets in addition to the central 12nm IO chiplet.

Each CPU chip is equipped with a second chip with 3D V-Cache. This works so that there is 32MB in the CPU chiplet, which the Zen 3 architecture has always connected to the eight-core CCX block. But this chip is punctured and in these vertical channels so-called TSV (through silicon via) channels are formed, which are filled with a copper conductor and open into contacts on the upper face of the silicon. At the same time, the chiplet is ground to a lower height.

A secondary chiplet containing the V-Cache is then adapted to it. This is a chip made on a TSMC 7nm process (N7, i.e. the same as the CPU chiplet) containing 64MB of SRAM (for cache), which is connected to the contacts on the above the CPU chiplet. It is not a question of soldering, but of directly soldering copper contacts together. This improves the signal quality and allows you to reduce the power consumption of the connection. It also allows for greater contact density. The 3D V-Cache chiplet has a smaller area, so there is an “empty” silicone insert on both sides. The assembly thus assembled then has the same height as a conventional CPU chiplet, so that the processor is then inserted into the same casing and under the same metal heat sink.

AMD 3D V Cache in Ryzen 1600 CPUs
AMD 3D V-Cache in AMD processors (Source: AMD)

More: AMD 3D V-Cache: Processors with additional 64MB cache mounted on Zen 3 cores

The added cache is paired with the original 32MB cache, so these processors have a monolithic block of 96MB L3 cache accessed by eight cores in a CCX/CPU chiplet. The design of the chiplet’s processor took this into account. Increasing the capacity with the second chiplet worsens the latency slightly, but not significantly – AMD states that by four cycles. For Zen 3 (but also for Intel), the latency in the number of cycles varies according to the part accessed, which is also the case here. The first 32 MB L3 cache, which probably corresponds to the “local part” directly of the CPU chiplet, has a reduced latency of four cycles, while in the 32 MB – 96 MB range formed by the second chiplet, the latency slows down more linearly by adding additional blocks. This can be seen in this graph by Ian Curess (former editor of AnadTech).

The entire cache must have 16-way associativity. The total throughput from/to it doesn’t change, but according to AMD it would still exceed 2TB/s. Each of CCX’s eight cores can use the full 96MB directly. The kernel belonging to another CPU chiplet is not accessible directly by the kernel, but only through the Infinity Fabric bus (and therefore with lower performance). So keep in mind that although it has a total cache of 768MB, it is actually 8×96MB.

Diagram of AMD Epyc 7003 processor with 3D V Cache
Diagram of the AMD Epyc 7003 processor with 3D V-Cache (Source: AMD, via AnandTech)

Models

AMD is publicly offering four models of these Milan-X processors, which complement the standard Epyce 7003 offering and should be physically available for purchase as of yesterday (but large hyperscale customers have had them for some time).

These 3D V-Cache models can be identified by the letter X in the name. All models contain eight CPU chipsets and eight cache chipsets, so this is always a full configuration, so the L3 cache has a total of 768MB for all models. But the number of active cores varies. AMD offers a fully active 64-core, in addition to a 32-core, where only half of the Zen 3 cores are active in each CPU chiplet.

The most powerful model Epyc 7773X with 64 cores and 128 fibers (thanks to SMT), it has a base frequency of 2.20 GHz and a maximum boost of 3.50 GHz at 280W TDP. It officially costs $8,800. The beats are lower than the standard Epyc 7763 (2.45-3.50 GHz). Model Epyc 7573X with 32 cores / 64 fibers, it has clock speeds of 2.80 to 3.60 GHz. Here it is not so much less than the regular model (Epyc 7543 at 2.8-3.7 GHz).

The 24- and 16-core models have a slightly lower TDP, just 240W. Epyc 7473X with 24 cores / 48 fibers has clock speeds from 2.80 to 3.70 GHz, 16 cores / 32 fibers Epyc 7373X is at 3.05–3.80 GHz. However, the TDP of all four models can be set in the 225-280W range.

Epyc 7003 Milan X CPU Models and Prices with 3D V Cache
Epyc 7003 Milan X processor models and prices with 3D V-Cache (Source: AMD)

All models have full connectivity and full functionality – eight-channel DDR4-3200 memory with ECC and up to 128 PCI Express 4.0 lanes. There is no more segmentation. They are compatible with standard SP3 boards and servers – The addition of a 3D V-Cache is a change, isolated inside the CPU, so no new heatsinks, power supplies or similar changes are needed. The Milan-X processor/server board will only need a firmware update.

Suitable for CAD/CAM and HPC applications

These processors are not designed for the regular server market – general servers will generally be more comfortable with cheaper standard processors without 3D V-Cache. According to AMD Milan-X, however, it has great advantages for special applications, where the 768MB L3 cache can significantly improve performance. These are mainly technical and scientific calculations and simulations such as flow analysis (Computational Fluid Dynamics).

Target Applications for AMD Epyc 7003 with 3D V Cache
Target applications for AMD Epyc 7003 with 3D V-Cache (Source: AMD, via AnandTech)

One such targeted use is CAD/CAM tools. According to AMD, Epycy 7003 “Milan-X”, for example, has 51-78% better performance in Ansys Fluent tools compared to conventional Epycy 7003. The 3D V-Cache should also have great benefits for structural analysis and, among other things, chip design (when verifying the RTL design in Synopsys VCS, the Epyc 7003 with 3D V-Cache would have performance up to ‘66% higher). Phoronix has already done some benchmarks on the Linux platform.

In general, these processors can be useful when a job can take advantage of a large amount of constantly cached data directly in the processor. Conversely, if all the data is flowing through the processor and exiting through memory during calculations, the cache may not help. The key here is to use this data multiple times. Therefore, there may be other applications where a large 3D cache will provide significant performance gains.

Performance Benefits of 3D V Cache u Epyců 7003 Milan X
Performance benefits of 3D V-Cache at Epyců 7003 Milan-X (Source: Microsoft, via AnandTech)

According to AMD, one of these applications is computer games, which of course will not be used for Epyc, but for the consumer version, the Ryzen 7 5800X3D for the AM4 desktop platform. It goes on sale on April 20, so it can potentially be used as a low-cost platform for testing the effects of large caches on various software algorithms.

Sources: AMD, Anand Tech

AMD launches Epyc 7003 processors with 768 MB of virtual 3D cache. Big benefits for HPC and CAD/CAM

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